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ATmega128
Timer/Counter
Prescaler
Figure 45. Prescaler for Timer/Counter0
clk I/O
TOSC1
clk T0S
Clear
10-BIT T/C PRESCALER
AS0
PSR0
0
CS00
CS01
CS02
TIMER/COUNTER0 CLOCK SOURCE
clk T0
The clock source for Timer/Counter0 is named clk T0 . clk T0 is by default connected to the main
system clock clk I/O . By setting the AS0 bit in ASSR, Timer/Counter0 is asynchronously clocked
from the TOSC1 pin. This enables use of Timer/Counter0 as a Real Time Counter (RTC). W hen
AS0 is set, pins TOSC1 and TOSC2 are disconnected from Port C. A crystal can then be con-
nected between the TOSC1 and TOSC2 pins to serve as an independent clock source for
Timer/Counter0. The Oscillator is optimized for use with a 32.768kHz crystal. Applying an exter-
nal clock source to TOSC1 is not recommended.
For Timer/Counter0, the possible prescaled selections are: clk T0S /8, clk T0S /32, clk T0S /64,
clk T0S /128, clk T0S /256, and clk T0S /1024. Additionally, clk T0S as well as 0 (stop) may be selected.
Setting the PSR0 bit in SFIOR resets the prescaler. This allows the user to operate with a pre-
dictable prescaler.
Special Function IO
Register – SFIOR
Bit
Read/ W rite
Initial Value
7
TSM
R/ W
0
6
–
R
0
5
–
R
0
4
–
R
0
3
ACME
R/ W
0
2
PUD
R/ W
0
1
PSR0
R/ W
0
0
PSR321
R/ W
0
SFIOR
? Bit 7 – TSM: Timer/Counter Synchronization Mode
W riting the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to the PSR0 and PSR321 bits is kept, hence keeping the corresponding
prescaler reset signals asserted. This ensures that the corresponding Timer/Counters are halted
and can be configured to the same value without the risk of one of them advancing during con-
figuration. W hen the TSM bit is written to zero, the PSR0 and PSR321 bits are cleared by
hardware, and the Timer/Counters start counting simultaneously.
109
2467X–AVR–06/11
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